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Micrel
MICRF505BML/YML
2
LD_en
Lock detect function (1=enable)
1
0
PF_FC1
PF_FC0
Prefilter corner frequency 2.bit
Prefilter corner frequency 1.bit
Ref. Table 5
Ref. Table 5
0000010
7
6
5
4
CP_HI
SC_by
VCO_by
PA_by
High charge-pump current (0=125uA, 1=500uA)
Bypass of Switched Capacitor filter (1=enable)
“0” mandatory. Bypass of VCO (1=enable)
Bypass of PA (1=enable)
3
2
1
0
OUTS3
OUTS2
OUTS1
OUTS0
Test pins output 4.bit
Test pins output 3.bit
Test pins output 2.bit
Test pins output 1.bit
Ref. Table 8
Ref. Table 8
Ref. Table 8
Ref. Table 8
0000011
7
6
IFBias_s
IFA_HG
“1” mandatory.
“1” mandatory. High gain setting in preamplifier
“0” mandatory. Select separate bias for VCO on
5
4
3
2
1
0
VCO_Bias_s
VCO_IB2
VCO_IB1
VCO_IB0
VCO_freq1
VCO_freq0
VCOBias pin (1=enable)
VCO bias current setting, 3. bit (111 = highest current)
VCO bias current setting, 2. bit
VCO bias current setting, 1. bit
Frequency setting of VCO, 2. bit (11=highest frequency)
Frequency setting of VCO, 1.bit
0000100
0000101
0000110
0000111
0001000
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
Mod_F2
Mod_F1
Mod_F0
Mod_I4
Mod_I3
Mod_I2
Mod_I1
Mod_I0
---------
---------
Mod_FHG
Mod_shape
Mod_A3
Mod_A2
Mod_A1
Mod_A0
---------
Mod_clkS2
Mod_clkS1
Mod_clkS0
BitSync_clkS2
BitSync_clkS1
BitSync_clkS0
BitRate_clkS2
BitRate_clkS1
BitRate_clkS0
RefClk_K5
RefClk_K4
RefClk_K3
RefClk_K2
RefClk_K1
RefClk_K0
SC_HI
ScClk_X2
ScClk5
Modulator filter setting, MSB (0=filter active)
Modulator filter setting
Modulator filter setting, LSB
Modulator current setting, MSB
Modulator current setting
Modulator current setting
Modulator current setting
Modulator current setting, LSB
Reserved/not in use
Reserved/not in use
“0” mandatory. Modulator Test bit.
“1” mandatory. Modulator shape enable
Modulator attenuator setting, MSB (1=attenuator active)
Modulator attenuator setting
Modulator attenuator setting
Modulator attenuator setting, LSB
Reserved/not in use
Modulator clock setting 3.bit, MSB
Modulator clock setting 2.bit
Modulator clock setting 1.bit, LSB
BitSync clock setting 3.bit, MSB
BitSync clock setting 2.bit
BitSync clock setting 1.bit, LSB
Bitrate clock setting 3.bit, MSB
Bitrate clock setting 2.bit
Bitrate clock setting 1.bit. LSB:
Reference clock divider 6.bit, MSB
Reference clock divider 5.bit
Reference clock divider 4.bit
Reference clock divider 3.bit
Reference clock divider 2.bit
Reference clock divider 1.bit, LSB
“1” mandatory. High current in Switched Cap filter
“1” mandatory. Switched Cap clock multiplied by two
SwitchCap clock divider 6.bit MSB
October 2006
36
M9999-103106
+1 408-944-0800
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